TSMC Introduces CoW-SoW Platform for Giant 3D Chips: Future of Wafer-Scale Integration

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TSMC introduced a new generation of the System-On-Wafer (CoW-SoW) platform, which uses 3D layout technology. The basis of CoW-SoW is the InFO_SoW platform, which the company introduced in 2020, which allows the creation of logical processes at the scale of a silicon wafer of 300 mm. So far, only Tesla has adapted this technology. It is used in her supercomputer Dojo.

In the new CoW-SoW platform, TSMC is going to combine two packaging methods – InFO_SoW and System on Integrated Chips (SoIC). Using Chip-on-Wafer (CoW) technology, this method allows memory and/or logic to be placed directly on top of the system-on-wafer. The new CoW-SoW technology is expected to be ready for mass production by 2027.

“In the future, wafer-scale integration will allow our customers to integrate even more logic and memory components. SoW technology is no longer fiction. This is something we are already working on with our customers for the prospect of using it in their existing products. We believe that advanced wafer-level integration technology will allow our customers to continue to expand the computing power of their AI systems or supercomputers.”said Kevin Zhang, vice president of business development at TSMC.

TSMC is now considering the possibility of combining logical processors with high-performance HBM4 memory within the CoW-SoW platform. The latter will have a 2048-bit interface and will be located directly on top of the logic chips. At the same time, the ability to put additional logic on a wafer would optimize production costs.

Wafer-scale processors (such as Cerebras’ WSE) and InFO_SoW processors provide significant performance and efficiency gains through high throughput, low inter-core latency, low power impedance, and high energy efficiency. As an added “bonus”, such processors offer accommodation capability large size computing cores.

However, the same InFO_SoW technology has some limitations. For example, the efficiency of wafer-scale processors may be limited by the efficiency of on-board memory. The CoW-SoW platform overcomes this limitation because it is intended to use high-performance HBM4 memory. In addition, InFO_SoW wafers are processed using only one process technology and does not support 3D format. This issue can be solved with the new CoW-SoW platform.