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TSMC has announced an improved 4nm process. In addition to better parameters, it should also be slightly less expensive than 5nm technology. This is important because it will hopefully allow it to be used by cheaper GPUs, SoCs or processors that would otherwise have to stay on older technologies…
TSMC with a slightly delayed 3nm production process. Although not dramatically, the company with finished chips, due to the long time it will take to complete all stages of processing, will not have time to deliver the first finished chips in 2022, but only in 2023. But now the Taiwanese company , introduced an improved process that could alleviate the vacuum in manufacturing technologies: N4P technology.
4nm 2nd generation process: better performance / consumption, area and price
The N4P process is referred to as 4nm, and will be the second, improved generation of 4nm technology after the initial incarnation of N4. However, this 4nm process is not an independent generation as the 7nm or 5nm process was and what the 3nm process will be like. In fact, it is rather an improved evolution of EUV 5nm technology, which is to improve the parameters of the resulting chips. But it could allegedly bring some financial savings, these chips could reportedly be a little cheaper than very expensive 5nm chips.
The TSMC states that achievable performance is to be improved. Compared to the first 4nm process, the N4P is expected to perform up to 6% better, and if combined with the improvements of the N4 process, N4P chips should have the potential for up to 11% better performance (frequency) than chips made first. generation 5nm process (N5).
Alternatively, the N4P process could achieve up to 22% better energy efficiency over N5 technology if the chip runs at the same clock speed. As usual, it will not be possible to choose both of these benefits at the same time, and it is likely that the reduction in consumption will apply to some lower measures, not the maximum ones.
On the contrary, what could accumulate with an improvement in power (or consumption) is an improvement in the density of the transistors. The N4P process is supposed to allow some small incremental thickening and thus chip reduction, it is supposed to be possible to improve the density of transistors by up to 6% – compared to the density of transistors achieved by the N5 process.
Gallery: 7nm chip produced by TSMC process, AMD Navi 14 (photogallery)
Compression can lead to some reduction in production costs if engineers can reduce the proposed chip. However, N4P technology is supposed to bring savings beyond what smaller companies with smaller margins will need, because the financial demands for the use of the latest technologies are still rising sharply (as prices for one wafer deteriorate dramatically, we discussed here). The N4P process is supposed to bring some partial relief, because it is supposed to be a bit less complex compared to the N5 process. It has slightly less masks, which means savings in fixed one-time investments needed to start production (but, for example, corrective revisions) and probably also variable costs. The wafer will require fewer production steps, so it will spend less time in the factory, and TSMC could probably charge a slightly smaller amount (but probably still higher than for 7nm / 6nm production).
Migration to this technology should be relatively easy for designs that were created for the 5nm process, the rules should be relatively similar, so that porting a design should be easier.
Parallel cheaper technology complementing the 3nm process
However, the N4P process will not be a patch for delaying the N3 process. TSMC states that it does not expect the first chip-outs of chips that customers will produce on this technology until the second half of 2022 (and the general rule is that the actual launch of the chip occurs no earlier than 9-15 months after the tape-out). The silicon produced by this process will thus be available on the market about later than 3nm of silicon. Chip designs for this technology also probably started relatively later.
The N4P process should probably be seen as a cheaper and slightly worse substitute for N4P for those clients who need a more economical solution. So it is not a technology that aims to temporarily fill a gap before the 3nm process is complete. Both technologies will coexist in the future and play different roles in the TSMC portfolio (and in the arsenal of weapons from manufacturers of processors, GPUs, mobile SoCs and other semiconductor products).
For example, in mobile phones, 3nm can be expected to be processors for flagship and high-end models, while N4 and N4P processes will appear in mid-range phones – perhaps a year later than expensive mobile phones will ever receive their 3nm chips as highend jumps to the latest technology very quickly, while in cheaper areas the process is slower.
Source: TSMC