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04.08.2023 19:27, Sergey Surabekyants
According to Elon Musk, who purchased 10,000 NVIDIA accelerators, it was necessary to get them “harder than drugs”. NVIDIA explained that the bottleneck in GPU manufacturing was the chip packaging stage. NVIDIA H-Class GPUs (for accelerators) use TSMC 2.5D Chip-on-Wafer-on-Substrate (CoWoS) packaging technology, a multi-stage, high-precision process whose high complexity limits its performance.
Image Source: NVIDIA
There are many factors that can affect the fabrication of semiconductors, ranging from design errors, power outages, material contamination, to simple shortages of rare earths or other materials. But the problem with CoWoS packaging may be more serious than expected.
TSMC said it will take 1.5 years to complete the construction of additional factories and expand existing facilities to make up for the packaging process lagging behind the speed of the production of the chips themselves. This means that NVIDIA will have to prioritize the release of their products – there will not be enough time and opportunity to package them all.
TSMC is one of the few players today with functional, high-performance packaging technology, which is an absolute requirement for performance scaling. But there is hope that Intel Foundry Services (IFS) will soon be able to compete with TSMC in this area. Samsung is also making great efforts to close the manufacturing technology gap compared to TSMC. Recently, there was even information that NVIDIA will instruct Samsung to package chips for AI accelerators. If this turns out to be true, then the problem of the shortage of GPUs for accelerators will be, if not solved, then at least somewhat smoothed out.
2023-08-04 16:27:00
#problems #supply #GPUs #accelerators #complex #packaging #chips
