It was already rumored in the summer that chiplet models with the RDNA 4 architecture would not go on the market. There will certainly be more reasons, but the main ones include a combination of limited CoWoS case capacities (which are needed for layered cases) and weak demand for graphics cards. Since the chiplet configuration was to be used by the GPU Navi 41 a Navi 42were expected to remain monolithic models Navi 43 a Navi 44.
However, it seems that Navi 43 has been replaced by a configuration called Navi 48 (the higher number shows that the impetus for its development came much later than for the original quartet). However, this does not change the fact that it should be a more powerful configuration than Navi 44. AMD is said to be considering two possible configurations Navi 48 a Navi 44:
| Navi 48 | Navi 44 | |||
|---|---|---|---|---|
| WGP | 32 | 20 | ||
| CU | 64 | 40 | ||
| stream-proc. | 4096 | 2560 | ||
| Infinity Cache | 32 MB | 48 MB | 24 MB | 32 MB |
| memoirs | GDDR7 | GDDR7 | ||
| bus | 128 bit | 192 bit | 96 bit | 128 bit |
| PCIe | PCIe 5.0 ×8 | PCIe 5.0 ×16 | PCIe 5.0 ×8 | |
Information on configuring a more powerful GPU (here Navi 48) with 4096 stream-processors match the MLID messages, on the contrary the configuration of the lower model (Navi 44) should have been lower according to MLID (2048 stream-processors, not 2560). According to RedGamingTech, however, all variants look like they are built on GDDR7 in combination with PCIe 5.0 – the only uncertainty is whether AMD will choose 16 lanes or 8 for the more powerful model.
Navi 48 can get 32-48MB Infinity Cache combined with 128-192bit bus, Navi 44 then 24-32 MB Infinity Cache with 96-128bit bus. In the GDDR7 memory generation, there should already be “non-binary” memory configurations, i.e. chips with a capacity different from the classic values such as 2 / 4 / 8 / 16 Gbit (0.25 / 0.5 / 1 / 2 GB), thanks to which it will be possible to hang on, for example, a 128-bit bus with a capacity other than 4 / 8 / 16 GB memory, for example 6 / 12 / 24GB without using chips of different capacities, which would cause known problems (see the “3.5GB” GeForce GTX 970 case).
| 64bit | 96bit | 128bit | 160bit | 192bit | 256bit | 320bit | 384bit | |
|---|---|---|---|---|---|---|---|---|
| GDDR6 | 4 GB 8 GB¹ |
6 GB 12 GB¹ |
8 GB 16 GB¹ |
10 GB 20 GB¹ |
12 GB 24 GB¹ |
16 GB 32 GB¹ |
20 GB 40 GB¹ |
24 GB 48 GB¹ |
| GDDR7 | 4 GB 6 GB 8 GB¹ 8 GB² 12 GB¹ 16 GB³ |
6 GB 9 GB 12 GB¹ 12 GB² 18 GB¹ 24 GB³ |
8 GB 12 GB 16 GB¹ 16 GB² 24 GB¹ 32 GB³ |
10 GB 15 GB 20 GB¹ 20 GB² 30 GB¹ 40 GB³ |
12 GB 18 GB 24 GB¹ 24 GB² 36 GB¹ 48 GB³ |
16 GB 24 GB 32 GB¹ 32 GB² 48 GB¹ 64 GB³ |
20 GB 30 GB 40 GB¹ 40 GB² 60 GB¹ 80 GB³ |
24 GB 36 GB 48 GB¹ 48 GB² 72 GB¹ 96 GB³ |
¹ – only clammshell mode (more expensive more complex PCB, usually only used on pro cards)
² – valid for 32Gbit / 4GB chips (if+when available, which won’t be in the foreseeable future)
³ – combination of both (¹+²)
Therefore, thanks to 24Gbit / 3GB chips, it will be possible to equip the 96-bit bus with 9 GB of memory capacity, the 128-bit bus with 12 GB of memory capacity, the 192-bit bus with 18 GB of memory capacity, etc. (all hypothetical options can be found in the table above).
According to RedGamingTech, AMD originally planned development so that it could release the news in the first half of next year, which would mean an introduction at Computex 2024. However, it currently seems that due to lower sales of current card models that have Navi 48 a Navi 44 to replace, the news will be released in autumn rather than in summer.
2023-12-05 09:04:38
#Radeon #RDNA #GDDR7 #PCIe #mainstream #package
