In its current offer of x86 processors, Intel mainly uses architectures Sunny Cove (server and mobile processors Ice Lake, desktopový Rocket Lake) a Willow Cove (mobile processors Tiger Lake). New x86 architecture Golden Cove to debut on desktop processors Alder Lake at the end of this year.
As for server processors Sapphire Rapids, conflicting information has appeared so far. While leaked internal materials and patches for Linux said it would be Willow Cove, unofficial leaks and instruction set suggested newer Golden Cove. Support for newer instructions and different cache configuration, however, did not mean anything in itself, it has been typical for Intel for many years that the server variant of the one-generation architecture supports instructions other than desktop (eg AVX-512, BFLOAT16, etc.) and the desktop version has a different cache configuration than the server version (Skylake vs. Skylake-X).
Now Intel has changed the inclusion of processors in a new patch Sapphire Rapids from architecture Willow Cove to newer Golden Cove:
Intel’s goal was probably not to reveal for as long as possible that after many years it will be able to shorten the interval between the release of the PC and the server version of the architecture (see e.g. Skylake: August 2015 – June 2017, Ice Lake: August 2019 – April 2021). The generation of Xeons, which has been postponed several times Sapphire Rapids, which according to unofficial reports is to be available perhaps in the spring of 2022, will have compared to the current generation of Epyc Milan with cores Zen 3 about 20% advantage in terms of IPC, on the other hand to the existing Epyc Milan the advantage will remain in the form of a 14% higher number of cores.
Epyc is expected in 2022 Genoa / Zen 4 with also ~ 20% increase in IPC and intergenerationally 50% higher number of cores (71% more compared to Sapphire Rapids).
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