Chip Efficiency Revolution: TSMC A16 Super-Rail Process Unveiled in 2025

With the evolution of Moore’s Law, transistors are getting smaller and denser, and the number of stacked layers is increasing. It may be necessary to go through 10 to 20 layers of stacks to transmit power signals and feeding data to the basic transistors led to a series of interconnects and power lines joining an increasingly confusing network. At the same time, when electrodes are laid down, an IR voltage drop occurs, leading to a loss of power.

In addition to power loss, space taken up by power supply lines is also an issue. The complex background process of chip power line wiring often accounts for at least 20% of the semiconductor industry’s resources to start focusing on power supply The reason why the network is moved to the back of the chip.

TSMC A16 super-rail process unveiled in 2025, complex technology improves chip efficiency

Head of the wafer foundryTSMCThe A16 process was recently announced at the North American Technology Forum. Even worse, the A16 incorporates a combination of Super PowerRail architecture and nanosheet transistors to drive the development of faster and more efficient data center processors. A16 uses different chip wiring.

One way to optimize a processor is to reduce IR attenuation, which reduces the voltage received by the chip transistors and reduces performance. A16 wires are less prone to voltage drops, which not only simplifies power distribution, but also allows chip circuits to be packed more tightly, with the goal of fitting more transistors into processes to increase computing power. A transistor has four main parts, source, drain, channel and gate. The source is the entry point for current to flow into the transistor, the drain is the exit, and the channel and gate are responsible for the movement of electrons. – order in order.

TSMC A16 connects the power transmission lines directly to the source and drain, deciding on a more complex design as it helps improve chip performance. Super Rail A16 will have the same Vdd (operating voltage) as N2P, increase computing speed by 8% to 10%, or reduce power consumption by 15% to 20% at the same computing speed, increase chip density up to 1.10 times, and support to data center products.

Intel PowerVia is ready for production this year Intel 20A

Similar to TSMC Super Rail, Intel also launched PowerVia, a back-end power supply solution. The power line may initially occupy 20% of the chip space, but PowerVia saves space behind the power supply, which also means that the interconnection level can be more easy

The Intel team also made the Blue Sky Creek test chip specifically to prove that the power supply lines and interconnect lines on the back can be separated and made larger in diameter to improve power supply and signal transmission. Test results show that the normal unit utilization rate in most areas of the chip is higher than 90%, the platform voltage is reduced by 30%, and the frequency is increased by 6 %. and is expected to reduce costs. The PowerVia test die also showed good thermal properties, in line with the higher power density expected to be achieved with logic scaling.

PowerVia also plans to introduce Intel Incubation Services (IFS), which will allow customers to design chips to achieve energy efficiency and faster performance improvements. Introduction to Intel PowerVia backup power supply starting a step (First Stepping) in the wafer factory.

Samsung SF1.4 process application in 2027

In addition to being a leader in revolutionizing GAA transistor technology, Samsung, another competitor of TSMC, also has behind-the-scenes power supply (BSPDN) as Samsung’s trump card in pursuing advanced manufacturing processes. Previously, South Korean media reported that Jung Ki-tae Jung, chief technology officer of Samsung’s foundry division, had announced that rear-end power supplies would be used for the 1.4nm process in 2027 .

Compared with the traditional front-end power supply network, Samsung’s back-end power supply network reduces the wafer area consumed by 14.8%, provides more chip space, adds more transistors, improves overall performance , and reduces wiring length by 9.2%, helping to reduce resistance and allow more multi-current to pass through, reducing power consumption and improving power transmission conditions. Relevant sources said that the mass production time of power supply semiconductors may change according to customer records, and Samsung is studying what customers want.

(Source of first image: Photo by Science and Technology News)

New scientific and technological knowledge, updated from time to time