HKEPC reports that a 144-page document containing specifications for the Ryzen Strix Point and Strix Halo processors has been leaked. AMD has yet to reveal details about the next-generation Zen 5 APUs, but thanks to the leak, a lot of interesting things have emerged.
The Strix Point (STX) 12 Zen comes with 5 cores and 24 threads, and also features 12 MB L2 cache and 24 MB L3 cache. This APU will have 8 WGPs based on the RDNA3.5 architecture, which corresponds to 16 computing units. XDNA2 AI-Accelerator offers 50 TOPS, which is more than three times faster than Hawk Point. The APU will support DisplayPort 2.1 specifications, even in UHBR10 transfer mode. Strix Point is expected to have a TDP of 45-65W and will use an FP8 socket.
According to the document, Strix Halo (STX Halo) will be a 16-core and 32-thread product. Like the STX, this model also gets 1MB per core, which means 16MB of L2 cache and 32MB of L3 cache. In addition, the Strix Halo will also include a 32MB MALL Cache, which will work in the same way as the Infinity Cache. The APU will support the XDNA2 processor developed for artificial intelligence, which provides up to 60 TOPS. It also supports DisplayPort 2.1 up to UHBR20 mode, and we can expect a 70-130 W output that uses the FP11 socket. Judging from the slide, the Halo supports 256-bit LPDDR5X-8000 memory, while the Point supports up to LPDDR5x-7500 memory.
AMD is already preparing for Computex, where the desktop and mobile Zen 5 series can be discussed, so hopefully we will learn more about the Ryzen 9000, i.e. the Strix series, at the latest .
2024-04-28 23:30:34
#AMD #Ryzen #Strix #Halo #specifications #leaked
